In January of 2022 I developed an 8-bit ISA card that housed breadboard modules for easy prototyping on the ISA bus. Following a request to release the design, I have uploaded all files to Github under open-source hardware license.
I designed this card around two standard breadboard modules that could be stuck to its surface. The only slight difference is the use of one single power rail module between the two main prototyping modules.
This card breaks out the ISA bus signals and allows for rapid prototyping directly with an ISA card slot. On the reverse of the card is flat space for even more breadboard modules if needed. The common signals (address, data, IOW, IOR, Reset, etc) are grouped on a breakout on the top edge for convenience. The holes on left and right allow for passing wires between front and back if required.
v1.1 has only very minor tweaks from the v1.0 design. Suggested capacitor values have been added to the silkscreen, and the notes in the bottom left have been re-positioned slightly to accommodate the capacitor value of C1. No other changes.
See my ISA_Bread_Board_v1.1 repository on Github to see specific board layers in pdf format (in the PCB_Layout folder).
I am releasing this design as Open Source hardware. I have chosen to use the “CERN Open Hardware Licence Version 2 – Permissive” model because it has been tailored specifically to hardware.
Project Files (Gerbers, Schematics, KiCad files, BOM, etc) can be found in my ISA_Bread_Board_v1.1 repository on Github.